Patent · US Expired

Bus-hold input circuit adapted for receiving input signals with voltage levels higher than the voltage supply thereof

US6184715A · kind A · utility

6Cited by
10References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 13, 1998
Grant dateFeb 6, 2001
Priority date
Expiry dateNov 13, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/018521
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An input circuit for an integrated circuit for interfacing an external signal line external to the integrated circuit includes first circuit means having an input that may be coupled to the signal line to provide a regenerated signal at their output, and second circuit means having an input coupled to receive the regenerated signal and driving the external signal line. The external signal line can thus be maintained at a predetermined logic level, even in the absence of any driving on the external signal line. Third circuit means are provided that are capable of providing to the second circuit means a supply voltage equal to the greater of a supply voltage of the integrated circuit to which the input circuit belongs, and the voltage existing on the external signal line.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.