High voltage output stage for driving an electric load
US6184716A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 1998 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Oct 30, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018585
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The invention relates to a high-voltage final output stage for driving an electric load, of the type which comprises a complementary pair of transistors connected between first and second supply voltage references, and at least one PMOS pull-up transistor connected in series with an NMOS pull-down transistor. The stage comprises an additional PMOS transistor connected in parallel with the pull-up transistor and having the body terminal in common therewith. More particularly, the body terminals of both PMOS transistors are formed in the semiconductor within a common well which can withstand high voltages, and the additional transistor is a thick oxide PMOS power transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.