Apparatus and method for computer system interrupt emulation
US6185523A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 1998 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | Oct 5, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/45537
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Accordingly, provided is an apparatus and method for generating a computer system interrupt emulation having the effect of a hardwired interrupt. A service processor with a test circuit interface can be coupled to an integrated circuit, which has a test circuit with an access to a register of the integrated circuit. A program, executable by the processor, responds to an interrupt request by instructing the processor to save a system state of the integrated circuit and to set a system state of the integrated circuit. The method for emulating an interrupt of an integrated circuit provides for receiving an interrupt request. A register of an integrated circuit is then accessed through a test circuit of the integrated circuit. The contents of the register are saved to a storage location, and the register is then set to a state responsive to the interrupt request. The interrupt request may be made locally or remotely.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.