System for correcting an illegal addressing signal by changing a current bit from one to zero if a bit immediately left adjacent to the current bit is zero
US6185649A · kind A · utility
0Cited by
11References
6Claims
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Key dates
| Filing date | May 19, 1998 |
| Grant date | Feb 6, 2001 |
| Priority date | — |
| Expiry date | May 19, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4217
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and a method detect and automatically correct an illegal address in a peripheral connect interface bus addressing scheme. The value of a current bit is read. The value of a bit immediately left adjacent of the current bit is read. A value of 0 is outputted as the current bit in the event the value of the current bit is 1 and the value of the left adjacent bit is 0. In one specific embodiment, the apparatus employs a multiplexer and a single-bit register with a feedback as a one bit detection and correction circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.