Programmable function block
US6188240A · kind A · utility
Assignees
Inventor
Key dates
| Filing date | Jun 4, 1999 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Jun 4, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable function block comprises a core logic circuit having a first argument input group consisting of first through fourth argument input terminals, a second argument input group consisting of first through fourth argument input terminals, first through third configuration input terminals, a core logic carry output terminal, a core logic carry generation output terminal, a core logic carry propagation output terminal, a ripple-core logic carry input terminal, and a sum output terminal. Connected to interconnection wires and the first and the second argument input groups, an input block includes eighth input selection units for selecting, as eight input selected signals, eight ones of signals on the interconnection wires, a fixed logic value of "1", and a fixed logic value of "0". Connected to the first through the third configuration input terminals, respectively, first through third memory circuits stores, as first through third stored logic values, a logic value of one bit. A carry logic circuit has a ripple carry input terminal, a ripple carry output terminal, a ripple-core logic carry output terminal, a core logic carry generation input terminal, and a core logic carry…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.