Method and apparatus for reducing phase noise in a voltage controlled oscillator circuit
US6188287A · kind A · utility
8Cited by
17References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1999 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Sep 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase noise optimization circuit (208) minimizes phase noise for a voltage controlled oscillator (VCO) (202). Control circuitry (214) locates a minimum phase noise region for VCO operation based on the slope of the VCO's changing control voltage (206) versus changing bias voltage (204) for a bias voltage range. The control circuitry (214) then adjusts the bias input so that the VCO operates in a region of minimum phase noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.