Wafer mapping system
US6188323A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 1998 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Oct 15, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67265
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer mapping system is disclosed mounted to the port door of a process tool. As the port door is lowered away from the access port of the process tool in order to allow wafer transfer through the port, the wafer mapping system according to the present invention detects the presence and position of the various wafers in the pod shell, which information may then be stored in memory for later use. As such, wafer mapping according to this system occurs without additional processing steps or time. The port door is lowered by a servo drive which allows the precise position of the port door to be identified at any given time. As such, the position of a wafer within the pod shell may be precisely identified by the wafer mapping system mounted on the port door as the door is lowered.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.