Impedance blocking filter circuit
US6188750A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 19, 1998 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Nov 19, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04M11/062
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An impedance blocking filter circuit is provided for use in telecommunication systems for interconnecting between incoming telephone lines and customer's terminal equipment so as to unconditionally block impedances above 20 KHz due to the customer's terminal equipment from an ADSL network unit and/or home networking interface unit. The filter circuit includes first, second, and third inductors connected in series between a first input terminal and a first common point. A first resistor has its one end connected also to the first common point and its other end connected to a first output terminal. Fourth, fifth and sixth inductors are connected in series between a second input terminal and a second common point. A second resistor has its one end also connected to the second common point and its other end connected to a second output terminal. A capacitor has its ends connected across the first and second common points. In another aspect, the filter circuit also includes current limiting protection circuitry for reducing ring trip, dial pulse and off-hook transient current spikes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.