Method and apparatus for a two-step calculation of CRC-32
US6189124A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 15, 1997 |
| Grant date | Feb 13, 2001 |
| Priority date | — |
| Expiry date | Oct 15, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6575
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and an apparatus to calculate the CRC-32 (Cyclic Redundancy Checking) codes of a bit stream while improving the process time and simple to implement. The CRC-32 calculation is used for FCS (Frame Check Sequence) error checking code of bit stream messages sent over a fixed size packet networks when the high speeds require reducing the processing time in the network access nodes. This CRC-32 calculation is also used for FCS checking in the network equipment receiving said packetized bit stream messages. This invention applies particularly to messages conveyed via AAL5 type cells in ATM networks. The CRC-32 per byte computation of the prior art is replaced by a simple per byte CRC-R computation followed by a one pass CRC-32 computation of the R bit stream, result of the CRC-R computation. The CRC-R codes being generated by a M(X), a polynomial of degree R, multiplier of the generator polynomial of degree 32, EQU (X)=X.sup.32 +X.sup.26 +X.sup.23 +X.sup.22 +X.sup.16 +X.sup.12 +X.sup.11 +X.sup.10 +X.sup.8 +X.sup.7 +X.sup.5 +X.sup.4 +X.sup.2 +X+1, the generator of the Galois Field constituting the CRC-32 codes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.