Silicon carbide integrated circuits
US6191458A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 1996 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Mar 11, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/148
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A depletion mode MOSFET and resistor are fabricated as a silicon carbide (SiC) integrated circuit (IC). The SiC IC includes a first SiC layer doped to a first conductivity type and a second SiC layer overlaid on the first SiC layer and doped to a second conductivity type. The second SiC layer includes at least four more heavily doped regions of the second conductivity type, with two of such regions comprising MOSFET source and drain electrodes and two other of such regions comprising resistor electrodes. The second SiC layer includes an isolation trench between the MOSFET electrodes and the resistor electrodes. At least two electrically conductive contacts are provided as MOSFET electrode contacts, each being positioned over at least a portion of a respective MOSFET electrode and two other electrically conductive contacts are provided as resistor electrode contacts, each being positioned over at least a portion of a respective resistor electrode. An oxide layer extends over the second SiC layer with at least a portion of the oxide layer positioned between the MOSFET electrode contacts. A MOSFET gate electrode is positioned over the oxide layer, and coupling means are provided for e…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.