Translators and methods for converting differential signals to single-ended signals
US6191619A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 1999 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Aug 24, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01812
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
High-speed signal translators are provided to convert differential input signals (e.g., ECL signals) to single-ended output signals (e.g., CMOS signals). An exemplary translator is formed with first and second current mirrors, first and second complimentary differential pairs of transistors, a complimentary transistor output stage and first and second current-diverting transistors. The complimentary output stage initially generates the single-ended output signal in response to currents received from the complimentary differential pairs. When the output signal has been established, the current-diverting transistors respond by carrying at least portions of the currents supplied by the complimentary differential pairs. The current-diverting transistors also drive the current mirrors to divert other portions of these currents away from the complimentary output stage. Stored charges in the output stage are accordingly reduced and its response time enhanced. Translator speed is further enhanced with elements associated with the current-diverting transistors that prevent saturation in the current mirrors and the complimentary output stage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.