Method and apparatus for texture level of detail dithering
US6191793A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1998 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Apr 1, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computationally efficient method for minimizing the visible effects of texture LOD transitions across a polygon. The minimization is accomplished by adding a dithering offset value to the LOD value computed for each pixel covered by a graphics primitive to produce a dithered pixel LOD value. The dithering offsets mat be generated from a table look-up based on the location of the pixel within a span of pixels. The dithered pixel LOD value is used to as an index in the selection of a single LOD texture map from which a textured pixel value is retrieved. The range of dithering offset values can be adjusted by modulating the values in the table look-up.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.