Self-timed parallel data bus interface to direct storage devices
US6192482A · kind A · utility
14Cited by
16References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1994 |
| Grant date | Feb 20, 2001 |
| Priority date | — |
| Expiry date | Jun 17, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/426
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An attached storage media link has a self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal, providing a high speed, cost effective interface to a direct access storage device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.