Method of planarizing the upper surface of a semiconductor wafer
US6194317A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1998 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Jun 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3212
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
This invention pertains to a method of modifying or refining a surface of a wafer suited for semiconductor fabrication. This method may be used to modify a wafer having an unmodified, exposed surface comprised of a layer of a second material deployed over at least one discrete feature of a first material attached to the wafer. A first step of this method comprises contacting and relatively moving the exposed surface of the wafer with respect to an abrasive article, wherein the abrasive article comprises an exposed surface of a plurality of three-dimensional abrasive composites comprising a plurality of abrasive particles fixed and dispersed in a binder and maintaining contact to effect removal of the second material. In a second step, the contact and relative motion are continued until an exposed surface of the wafer has at least one area of exposed first material and at least one area of exposed second material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.