Early voltage and beta compensation circuit for a current mirror
US6194886A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 1999 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Oct 25, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/265
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
An Early voltage and beta current compensated cascode current mirror includes a cascode current mirror having an input stage responsive to an input current, a current mirror circuit having a first stage responsive to the input stage and a second stage responsive to the first stage, and an output stage responsive to the second stage for providing an output voltage and current; and a compensation circuit, responsive to the cascode current mirror, having a first compensation stage, a second compensation stage and a bootstrapping buffer, the first compensation stage, in response to a change in the output voltage, impressing a corresponding change in voltage on the second compensation stage, the second compensation stage thereby providing a change in current to the cascode current mirror for cancelling current errors induced by base current modulation in the output stage, the bootstrapping buffer, in response to the change in voltage, impressing a corresponding change in voltage on the first compensation stage to prevent errors from base current modulation effects in the first compensation stage, the first and second compensation stages further providing a base current to the cascode cu…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.