Analog-to-digital converter with level converter and level recognition unit and correction memory
US6195031A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 1998 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Dec 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/188
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter circuit for digitalizing a high-frequency signal with large dynamics has a first analog-to-digital converter and a second analog-to-digital converter connected in parallel, a level converter connected to one of the two analog-to-digital converters, a level recognition element for determining a level range in which the high-frequency signal lies and for generating a control signal dependent on the level range, and a correction memory that is connected to the level recognition element, the correction memory having address inputs connected to outputs of the analog-to-digital converters. The control signal is used as a selection criterion which identifies which analog-to-digital converter address data are taken from for producing a digital output signal, the digital output signal being linearized according to a characteristic of the selected analog-to-digital converter in order to correct for distortion arising in the selected converter. The overall analog-to-digital converter circuit thus has an overall linear characteristic, even as the input signal varies between low and high amplitudes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.