Noise reduction signal processing circuit and display apparatus
US6195132A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1999 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Jul 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/21
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A noise reduction signal processing apparatus for reducing noises accurately, such as for use in a display apparatus for displaying a video signal, has a median filter (40) which receives the video signal, and which executes a filter processing on the inputted video signal and outputs a reference signal; a subtracter (50) which is connected with the median filter (40), and which outputs a difference signal that indicates a difference between a reference signal outputted from the median filter (40) and the video signal; a minimum value detection circuit (70) which outputs the difference signal from the subtracter (50) or a limitation value, whichever is smaller, as a minimum value signal; and an adder (35) which adds a noise reduction signal obtained on the basis of the minimum value signal output from the minimum value detection circuit (70) and the video signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.