FOD (first-one-detector) circuit
US6195673A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 1998 |
| Grant date | Feb 27, 2001 |
| Priority date | — |
| Expiry date | Sep 16, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/74
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A FOD (First-One-Detector) circuit for detecting the number of leading zeros counted from a most significant bit to a first one in a binary number includes a plurality of sub-FODs respectively having a plurality of unit blocks connected in cascade, when a fraction input is less than 16 bits, depending on the number of bits and respectively provided with a plurality of transmission transistors. When the fraction input is more than 16 bits, the plurality of sub-FODs respectively output the number of leading zeros with regard to predetermined bits of fraction inputs, and a determinative signal for determining whether the fraction inputs are all zeros. The sub-FODs respectively further include an encoding circuit for encoding the number of leading zeros outputted from the plurality of sub-FODs and the determinative signal and outputting the resultant number of leading zeros. The FOD circuit employs a fewer number of transistors and realizes a faster normalization by a quick detection of leading zeros.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.