Method and apparatus for aligning an integrated circuit chip
US6196849A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 5, 2000 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Apr 5, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K7/1061
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A three point alignment feature facilitates alignment of an integrated circuit chip relative to a socket that is mounted on a printed circuit board 14. The socket includes four walls that define a rectangle in which the integrated circuit chip is mounted. A first contact point 28 extends inward from a first one 22 of the walls. Second and third contact points 30, 32 extend inward from a second one 20 of the walls. A first force is applied against the integrated circuit chip from a third one 18 of the walls. Second and third forces are applied against the integrated circuit chip from a fourth one 16 of the walls. Hence, the integrated circuit chip is aligned in a corner defined by the first and second walls, and is oriented by the three contact points. Spring members 34, 36, 38, 40 may be employed to provide the first, second and third forces. Another alignment feature including two posts 52, 54 on the socket is employed to facilitate alignment of the socket with respect to the printed circuit board. The socket is rotatable about the first post 52 when inserted in a corresponding hole in the circuit board; insertion of the second post 54 into its corresponding hole prevents further …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.