Method for the fabrication of a doped silicon layer
US6197666A · kind A · utility
13Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 3, 1999 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Sep 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for the fabrication of a doped silicon layer, includes carrying out deposition by using a process gas containing SiH.sub.4, Si.sub.2 H.sub.6 and a doping gas. The doped silicon layer which is thus produced can be used both as a gate electrode of an MOS transistor and as a conductive connection. At a thickness between 50 and 200 nm it has a resistivity less than or equal to 0.5 m.OMEGA.cm.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.