MOS-gated power device having extended trench and doping zone and process for forming same
US6198127A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 19, 1999 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | May 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
Abstract
A trench MOS-gated device comprises a doped monocrystalline semiconductor substrate that includes an upper layer and is of a first conduction type. An extended trench in the upper layer of the substrate has a bottom portion filled with a dielectric material that forms a thick layer in the bottom of the trench. The upper portion of the trench is lined with a dielectric material and substantially filled with a conductive material, the filled upper portion of the trench forming a gate region. An extended doped zone of a second opposite conduction type extends from the upper surface into the upper layer on one side of the trench, and a doped well region of the second conduction type overlying a drain zone of the first conduction type is disposed in the upper layer on the opposite side of the trench. The drain zone is substantially insulated from the extended zone by the thick dielectric layer in the bottom portion of the trench. A heavily doped source region of the first conduction type and a heavily doped body region of the second conduction type is disposed in the well region at the upper surface of the upper layer. An interlevel dielectric layer is disposed on the upper surface over…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.