Maximum duty ratio setting circuit for a DC-DC converter
US6198264A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 2000 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Jan 19, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/156
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A duty ratio setting circuit includes a triangular waveform oscillation circuit for generating a triangular waveform signal and an error amplifying circuit that compares a detection voltage with a reference voltage and generates a control voltage based on the difference between the compared voltages. A comparator is connected to the oscillation circuit and the amplifying circuit and compares the voltage of the triangular waveform signal with the control voltage, and generates a first rectangular waveform signal having a predetermined duty ratio based on the comparison. A pulse signal generator generates a pulse signal having a predetermined pulse width and which is synchronized with the triangular waveform signal. A logic circuit connected to the comparator and the pulse signal generator receives the first rectangular waveform signal and the pulse signal and generates a second rectangular waveform signal. The second rectangular waveform signal has a maximum duty ratio based on the pulse width of the pulse signal when the duty ration of the first rectangular waveform signal exceeds the maximum duty ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.