Power sensing apparatus for power amplifiers
US6198351A · kind A · utility
16Cited by
2References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 10, 1999 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | May 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/523
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a power amplifier comprising a plurality of cascaded field effect transistors (FETs), a power sensing circuit for sensing the output power of the power amplifier comprising a FET device operative in a first linear mode and second saturated mode of operation, the FET having source, gate and drain electrodes; and a low value resistor connected between the source electrode and a reference potential for generating a voltage drop between the source and the reference potential such that when the FET operates in the saturation mode, the voltage drop is indicative of the output power of the power amplifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.