Printed circuit board with capacitors connected between ground layer and power layer patterns
US6198362A · kind A · utility
113Cited by
5References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 9, 1999 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Mar 9, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A printed circuit board is disclosed. A top layer power supply pattern and a top layer ground pattern are formed. The top layer power supply pattern and the top layer ground pattern are connected to a power supply layer and a ground layer through a plurality of viaholes, respectively. A plurality of capacitors or a plurality of capacitor resistor series circuits are disposed at predetermined intervals between the top layer power supply pattern and the top layer ground pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.