Memory device
US6198683A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2000 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | May 4, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device comprising: a step-down voltage generating circuit for generating a first step-down voltage by stepping down a power-supply voltage, and a second step-down voltage lower than said first step-down voltage; a peripheral circuit to which said first step-down voltage is supplied; and a memory core to which said second step-down voltage is supplied, wherein said step-down voltage generating circuit comprises a first step-down circuit for generating said first step-down voltage from said power-supply voltage supplied thereto, and a second step-down circuit for generating said second step-down voltage from said first step-down voltage supplied thereto, and a consumed current corresponding to said second step-down voltage is a first current value in a first operating period, and a second current value lower than said first current value in a second operating period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.