Word-line driving circuit and semiconductor memory device
US6198685A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2000 |
| Grant date | Mar 6, 2001 |
| Priority date | — |
| Expiry date | Mar 1, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided a word-line driving circuit has: two P-channel type transistors which are connected in a flip-flop configuration and one of which is connected between a first power supply and a word line; an N-channel transistor which is connected between a signal obtained by decoding a low-order address and a gate of the above-mentioned one P-channel type transistor and which has its gate connected with a signal obtained by decoding a high-order address; a first NN-channel type transistor which is connected between a word line and a second power supply and which has its gate connected with the signal obtained by decoding a low-order address; and a second NN-channel type transistor which is connected between a word line and the second power supply and which has its gate connected with the signal obtained by decoding a high-order address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.