Memory cell that includes a vertical transistor and a trench capacitor
US6200851A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 18, 1999 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Mar 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/395
Abstract
A memory cell for a dynamic random access memory includes a pass transistor and a storage capacitor. The transistor is a vertical transistor formed along an upper portion of a sidewall of a polysilicon-filled trench in a monocrystalline silicon body with the source and drain in the body and the source contact, gate and gate contact in the trench, with its gate dielectric being an oxide layer on the sidewall portion of the trench. The capacitor is a vertical capacitor formed along a deeper portion of the trench and has as its-storage plate a lower polysilicon layer in the trench and as its reference plate a deep doped well in the body. The source contact and the storage plate are in electrical contact in the trench and the source contact and the gate contact are in the trench electrically isolated from one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.