Thin film transistor and method of manufacturing the same
US6201260A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 1998 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Sep 14, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/674
Abstract
A thin film transistor of this invention has a structure obtained by sequentially stacking, on an insulating substrate, a silicon nitride film, a silicon oxide film, a polysilicon thin film with a channel region and source and drain regions facing each other via the channel region, an insulating film, and a gate electrode. The boron concentration decreases from the channel region toward the silicon nitride film in the silicon oxide film region between the channel region and the silicon nitride film. The silicon oxide film region between the channel region and the silicon nitride film is made up of a first region which is in contact with the channel region and has a boron concentration of 1.times.10.sup.16 atoms/cm.sup.3 or more, and a second region between the first region and the silicon nitride film, which has a boron concentration of less than 1.times.10.sup.16 atoms/cm.sup.3. The first region has a thickness of 200 .ANG. or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.