CMOS voltage reference with a nulling amplifier
US6201379A · kind A · utility
16Cited by
43References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1999 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Oct 13, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/242
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A CMOS voltage reference comprises a band-gap core, a primary amplifier and a "nulling" amplifier. The voltage reference may also include slope, level and curvature trim circuits to provide a low-cost CMOS voltage reference that can be trimmed after final packaging. Due to the nulling of the errors from other sources by the nulling amplifier, the trim circuits are able to adjust the variations from the band-gap core. The nulling amplifier uses switching techniques to provide an accurate null, but is configured to avoid injecting switch transients into the voltage reference output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.