Write current driving circuit
US6201421A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1999 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Jul 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/567
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A write current driving circuit in which drains of the transistors A1 and B1 are commonly connected to the base of the transistor T1, drains of the transistors C1 and D1 are commonly connected to the base of the transistor T2, inverted signal of the input signal into the transistors C1 and D1 is inputted into the transistors A1 and B1. Therefore, the transistors T1 and T2 can speedily be switched ON/OFF with suppressed power consumption. Transistors A2, C2 and transistors B2, D2 are connected in parallel with the transistors A1, C1 and NMOS transistors B1, D1 respectively, and the transistors A2, C2, B2, and D2 are turned ON only for a specified period of time immediately after the transistors T1 and T2 are switched ON/OFF.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.