CODEC for consecutively performing a plurality of algorithms
US6201488A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1999 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Feb 25, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3814
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A CODEC has a DSP which can consecutively execute a plurality of algorithms without restriction of a memory capacity. The DSP performs an encoding/decoding operation on a digital signal. A program memory stores a program divided into a plurality of block programs, the program being stored on an individual block program basis. A data memory stores a set of data used for executing each block program stored in the program memory, the set of data being divided into a plurality of data blocks and stored on an individual data block basis. A program executing unit executes each block program stored in the program memory by using a corresponding data block stored in the data memory. A program changing unit obtains a new block program from an external device each time execution of one of the block programs by the program executing unit is completed so as to store the obtained new block program in the program memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.