SIMD data processing extended precision arithmetic operand format
US6202077A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 24, 1998 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Feb 24, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3828
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Two related extended precision operand formats provide for efficient multiply/accumulate operations in a SIMD data processing system. Each format utilizes a group of "b" bit elements in a vector register. Each of the elements provides "m" bits of precision, with b>m. The remaining b-m bits in each element accumulate overflows and carries across multiple additions and subtractions. Existing SIMD multiply-sum instructions can be used to efficiently take input operands from the first format and produce output results in the second extended precision format when b.sub.2 =2b.sub.1 and m.sub.2 =2m.sub.1.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.