Processor having a clock driven CPU with static design
US6202104A · kind A · utility
54Cited by
12References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 28, 1998 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Jul 28, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor comprises a central processing unit being clock driven and having a static design. A memory is coupled with the central processing unit for storing interrupt routines and data. An interrupt control unit is coupled with said central processing unit for generating interrupt signals. An interrupt execution unit is provided for executing interrupt routines. If no interrupt routine is being executed the central processing unit is stopped from operating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.