Computer system having a single pointer branch instruction and method
US6202144A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 1999 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Mar 22, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system and method are described having a single pointer for a branch target instruction and multiple pointers and instruction parts for non-branch target instructions. All instructions, except branch target instructions are divided and stored in different location within a memory. A tag is used to identify a variable boundary between first and second halves of the memory space, word by word. The first half of the memory space contains V of H parts of the instructions and the second half of the memory space contains the H-V parts. The parts in the first and second halves of the memory space can be compressed and decompressed in parallel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.