Data processing circuit with gating of clocking signals to various elements of the circuit
US6202163A · kind A · utility
46Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 10, 1998 |
| Grant date | Mar 13, 2001 |
| Priority date | — |
| Expiry date | Mar 10, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing circuit (201) is shown having elements (315, 310) which operate in response to decoded instruction while receiving clocking signals. Instruction types are identified and clocking signals to at least one of the elements is enabled or disabled in dependence upon whether the element is required for the execution of the identified instruction type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.