Method of forming a silicide layer using an angled pre-amorphization implant
US6204132A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 1999 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | May 6, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/26586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the instant invention is a method of making a transistor having a silicided gate structure insulatively disposed over a semiconductor substrate which lies in an x-y plane, the method comprising the steps of: forming a semiconductive structure insulatively disposed over the semiconductor substrate (step 302 of FIG. 3); amorphizing a portion of the conductive structure by introducing an amorphizing substance into the semiconductive structure at an angle, theta, which is greater than seven degrees from a z-axis which is normal to the semiconductor substrate (step 310 of FIG. 3); forming a metal layer on the conductive structure (step 312 of FIG. 3); and wherein the metal layer interacts with the semiconductive structure in the amorphized portion of the conductive structure so as to form a lower resistivity silicide on the conductive structure (step 314 of FIG. 3). Preferably, the semiconductive structure is comprised of a material selected from the group consisting of: doped polysilicon, undoped polysilicon, epitaxial silicon, and any combination thereof; and the metal layer is comprised of a material selected from the group consisting of: titanium, Co, W, Mo, nickel,…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.