Apparatus and method for reducing crosstalk in an integrated circuit which includes a signal bus
US6204683A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 18, 1999 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | May 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0005
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method to compensate for variations in effective electrical impedance of a digital bus having plurality of transmission lines in a very large scale integrated circuit includes bus driver circuitry, which comprises a plurality of transistors coupled to an output node that is connected to a corresponding one of the transmission lines. Control circuitry is utilized to selectively enable/disable the transistors, thereby adjusting the driver impedance of the bus driver circuitry so as to match a state of the digital bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.