Apparatus and method for an improved master-slave flip-flop with non-overlapping clocks
US6204708A · kind A · utility
7Cited by
10References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 29, 1998 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Oct 29, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/35625
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved master-slave flip-flop that is characterized by a novel clock generator. The improved flip-flop preserves the true master-slave relationship by ensuring a two step latching process is executed by non-overlapping clocks. The clock generator features an inverter in combination with a current limiter. The current limiter has the effect of shifting the trip point of the inverter such that non-overlapping clocks may be derived from a single master clock signal or a master clock signal and its complement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.