Apparatus and method having improved memory controller request handler
US6204864A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 17, 1998 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Jul 17, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/395
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes one or more display devices, such as a cathode ray tube (CRT) or liquid crystal display (LCD) for providing a visible display to a user of the computer system. The computer system includes a video display controller (VDC) with a graphics generator. This VDC receives image information, such as text or graphics generated by a processor (CPU) or retrieved by the CPU from another facility (such as a CD-ROM) of the computer system, and provides signals driving one or both of the CRT or LCD displays. The VDC includes a sequencer and controller (SEQC) for a dynamic random access memory (DRAM) which is interfaced with the VDC. The SEQC arbitrates requests from various devices of the computer system for access to the DRAM, and facilitates these access according to a multi-tiered priority scheme. Accordingly, more efficient access to the DRAM is insured for the various devices of the computer system, and utilization of the DRAM, as well as the time of devices which are sometimes required to wait for access to the DRAM is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.