Branch instruction having different field lengths for unconditional and conditional displacements
US6205535A · kind A · utility
2Cited by
11References
26Claims
0Family size
Assignee
Inventors
- Shumpei Kawasaki
- Eiji Sakakibara
- Kaoru Fukada
- Takanaga Yamazaki
- Yasushi Akao
- Shiro Baba
- Toshimasa Kihara
- Keiichi Kurakazu
- Takashi Tsukamoto
- Shigeki Masumura
- Yasuhiro Tawara
- Yugo Kashiwagi
- Shuya Fujita
- Katsuhiko Ishida
- Noriko Sawa
- Yoichi Asano
- Hideaki Chaki
- Tadahiko Sugawara
- Masahiro Kainaga
- Kouki Noguchi
- Mitsuru Watabe
Key dates
| Filing date | Oct 6, 1998 |
| Grant date | Mar 20, 2001 |
| Priority date | — |
| Expiry date | Oct 6, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3814
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A branch instruction format has different respective field lengths for conditional branch instructions and unconditional branch instructions. A conditional branch instruction has a first bit length and a first area for a displacement designating an address to be jumped, wherein the first area has a second bit length that is smaller than the first bit length. An unconditional branch instruction also has the first bit length, and a second area for a displacement designating an address to be jumped, wherein the second area has a third bit length that is different from the first and second bit lengths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.