Level shift circuit with low voltage operation
US6208200A · kind A · utility
55Cited by
6References
23Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 13, 1998 |
| Grant date | Mar 27, 2001 |
| Priority date | — |
| Expiry date | Jul 13, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A level shift circuit capable of performing a low voltage operation without increasing the power consumption is described. A charge pump type level shift circuit incorporates NMOS transistors having well-in-well structures, where the potential of these wells are designed to rise along with the rise of the output voltage. The level shift circuit is capable of eliminating a back-bias effect and can lower the power source voltage to as low as 2V.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.