Data processing system for logically adjacent data samples such as image data in a machine vision system
US6208772A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 1997 |
| Grant date | Mar 27, 2001 |
| Priority date | — |
| Expiry date | Oct 17, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T5/20
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system including a data processor, also called a processing accelerator, processes at least one processor word each clock cycle. Each processor word includes multiple complete data samples which are received individually as part of a sequential stream of logically adjacent or related data samples such as in image data pixels which are part of an image to be processed by a machine vision system. A predetermined number of the data samples are stored together, as a processor word, in dedicated processing accelerator memory. For example, four 8 bit data samples can be stored together as one 32 bit processor word. The system also includes a data aligner which allows the processing accelerator to process at least one processor word comprised of at least one data sample from two processor words. The aligner controls data sample alignment such as for example, pixel alignment in the case of a vision system, to facilitate image data processing. Various processing units are also disclosed including: a neighborhood formation processing unit which, in a vision system, allows the processing accelerator to evaluate and process data within a neighborhood of one or more particular…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.