Protection of an integrated circuit with voltage variable materials
US6211554A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 7, 1999 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | Dec 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit die having on board protection against electrical overstress (EOS) transients. A device having an integrated circuit die with an outer periphery and a functional die area. A plurality of conductive input/output pads are formed on the integrated circuit die. A first conductive guard rail is disposed on the integrated circuit die and forms a gap between each one of the input/output pads. A voltage variable material is disposed in the gaps between the conductive guard rail and the input/output pads. A plurality of electrical leads are electrically connected to a respective one of the plurality of conductive input/output pads. At normal operating voltages, the voltage variable material is non-conductive. However, in response to an EOS transient, the voltage variable material switches to a low resistance state, providing a conductive path between the conductive guard rail and the input/output pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.