Computer system having integrated bus bridge design with delayed transaction arbitration mechanism employed within laptop computer docked to expansion base
US6212590A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 1998 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | Mar 13, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4031
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system includes a secondary bus bridge device in a portable computer and a another secondary bus bridge device in an expansion base to which the portable computer connects (docks). A peripheral in the expansion base may initiate a delayed cycle to read or write data to memory through a primary bus bridge device that also couples to a CPU. Both secondary bus bridge devices include an arbiter for controlling arbitration of a peripheral bus that connects both secondary bridge devices. The arbiter in the secondary bridge of the portable computer determines which of the arbiters will have arbitration control of the expansion bus to run cycles. When read data is available, in the case of a delayed read cycle initiated by a peripheral device in the expansion base, the primary bridge strobes a delayed cycle control signal to the arbiter in the portable computer which then gives arbitration control to the arbiter in the expansion base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.