Configurable I/O circuitry defining virtual ports
US6212591A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 2, 1999 |
| Grant date | Apr 3, 2001 |
| Priority date | — |
| Expiry date | Apr 2, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Configurable I/O circuitry having a plurality of configurable input/output elements, each of which connects one of a plurality of bits of a data bus to a corresponding one of the input/output terminals. Multiple clock selects and programmable enable signals can be connected to different interface elements to control activation of the interface element to which it is connected. The activated interface elements make up a virtual port that can be of any arbitrary bit width that is less than or equal to the fixed width of a physical port. This allows virtual ports on the data bus to be constructed that are narrower than the physical ports so that narrower data can be utilized in the port without causing the potential use of any of the data pins to be lost.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.