Method and apparatus for temperature-controlled testing of integrated circuits
US6215323A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 1999 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | May 28, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2874
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Method and apparatus for testing integrated circuits at controlled temperatures in a low thermal mass environment. The test system uses heat transfer elements such as Peltier devices inside the test head area to transfer thermal energy from one surface to another. The use of Peltier devices and the very low thermal mass of the combined test head and device under test (DUT), allow for fast and accurate temperature reduction of the DUT leads without using liquid Nitrogen. One embodiment of the test system is particulary suitable for low temperature testing of electronic devices that include magnetic sensitive elements such as Hall effect devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.