Monitoring of low currents through a low-side driver DMOS by modulating its internal resistance
US6215338A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 27, 1999 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | May 27, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/0092
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Relatively low currents are monitored through an integrated DMOS power transistor in a low-side driver configuration. A feedback circuit is responsive to the voltage applied to a gate of the DMOS power transistor to limit the minimum value to which the drain-source voltage may drop to keep it sufficiently high, and to allow a reliable monitoring of the current through the power transistor, even at relatively low levels. This is performed by increasing the conduction resistance of the power transistor at low current levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.