Patent · US Expired

Monitoring of low currents through a low-side driver DMOS by modulating its internal resistance

US6215338A · kind A · utility

9Cited by
7References
28Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 27, 1999
Grant dateApr 10, 2001
Priority date
Expiry dateMay 27, 2019

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R19/0092
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Relatively low currents are monitored through an integrated DMOS power transistor in a low-side driver configuration. A feedback circuit is responsive to the voltage applied to a gate of the DMOS power transistor to limit the minimum value to which the drain-source voltage may drop to keep it sufficiently high, and to allow a reliable monitoring of the current through the power transistor, even at relatively low levels. This is performed by increasing the conduction resistance of the power transistor at low current levels.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.