Reference voltage generating circuit with MOS transistors having a floating gate
US6215352A · kind A · utility
67Cited by
3References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 25, 1999 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Jan 25, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/242
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A reference voltage generating circuit with MOS transistors having a floating gate is disclosed. The reference voltage generating circuit has first and second MOS transistors in which substantially the same current flows by means of a current mirror circuit. The differential voltage between the threshold voltages of the first and second MOS transistors is applied from the source of the first transistor as the reference voltage. The first and second transistors are of a construction that includes a floating gate, and the threshold voltage can be set to any value by means of the amount of charge injected to the floating gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.