Distributed gain for audio codec
US6215429A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 19, 1999 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Jan 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0288
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit, e.g. an AC '97 conforming audio codec, includes a digital filter and gain module including multiple channels of gain control and multiple channels of digital filtering. A gain control module includes an overflow check of data samples requiring differing lengths of clamping. Each channel of the digital filter includes a finite impulse response (FIR) filter, and an infinite impulse response (IIR) filter. The digital filtering is implemented largely in hardware independent of the number of channels required and/or independent of the required order of the filtering. Thus, filter channels can be added or additional filtering implemented merely by increasing the clock speed without changing the digital filter design. The FIR filter is capable of being reset each frame to prevent a DC buildup at internal nodes. The IIR filter performs a plurality of 2.sup.nd order biquadratic equations in an overall average of as few as four clock cycles per 2.sup.nd order biquad. A RAM is used to store the state variables for the 2.sup.nd order biquadratic equations. The state variable RAM is reset by controlling the clear input of latches at an input and/or the output of the state…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.