Printed circuit board capacitor structure and method
US6215649A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 1998 |
| Grant date | Apr 10, 2001 |
| Priority date | — |
| Expiry date | Nov 5, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/5102
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A capacitive element for a circuit board or chip carrier having improved capacitance and method of manufacturing the same is provided. The structure is formed from a pair of conductive sheets having a dielectric component laminated therebetween. The dielectric component is formed of two or more dielectric sheets at least one of which can be partially cured or softened followed by being fully cured or hardened. The lamination takes place by laminating a partially cured or softened sheet to at least one other sheet of dielectric material and one of the sheets of conductive material. The total thickness of the two sheets of the dielectric component does not exceed about 4 mils and preferably does not exceed about 3 mils; thus the single dielectric sheets does not exceed about 2 mils and preferably does not exceed about 1.5 mils in thickness. The use of two or more sheets of dielectric material makes it very unlikely that two or more defects in the sheets of dielectric material will align thus greatly reducing the probability of a defect causing a failure in test or field use.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.